| 摘要 |
A boosting circuit configuration with high boosting efficiency is provided which is based on a boosting circuit that performs an operation in accordance with a two-phase clock and which includes a plurality (M>=4) of boosting cell sequences (units). A boosting cell in a K-th sequence (1<=K<=M) is controlled, depending on the potential of the output terminal of a boosting cell in a KA-th sequence (KA=(K-1) when (K-1)>0, and KA=M when (K-1)=0). Thereby, before a clock input to the boosting cell in the K-th sequence goes from "L" to "H", so that boosting is performed, a charge transfer transistor can be caused to go from the conductive state to the non-conductive state, so that a backflow of charges via charge transfer transistor can be prevented.
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