发明名称 VIDEO PROCESSOR AND VIDEO PROCESSING METHOD
摘要 According to one embodiment, a video processor includes an interface module which sequentially receives two video and audio multiplex streams to be spliced as a preceding stream and a following stream, and a stream converting module which sequentially extracts time information monotonously increasing in each of the preceding stream and the following stream received by the interface module and performs rewriting for shifting one time information of either the preceding stream or the following stream in lump such that the time information is continuous at a splice point between the preceding stream and the following stream.
申请公布号 US2009296741(A1) 申请公布日期 2009.12.03
申请号 US20090474352 申请日期 2009.05.29
申请人 KIZUKA YOSHIHISA;SAIJO HITOSHI;TANAKA SAYOKO 发明人 KIZUKA YOSHIHISA;SAIJO HITOSHI;TANAKA SAYOKO
分类号 H04H20/28;H04N5/44;H04N5/91;H04N7/173;H04N7/26;H04N11/04 主分类号 H04H20/28
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