发明名称 GRAPHICS DISPLAY SYSTEM WITH VIDEO SCALER
摘要 A video processing device may comprise one or more processors and/or circuits for use in a video processing device, in which the one or more processors and/or circuits may comprise a video scaler, a memory, a scaler engine, a clock selection circuit. The one or more processors and/or circuits are operable to receive a video image and select a video input clock or a display output clock for upscaling the received video image, or select the video input clock or the display output clock for downscaling the received video image based on a determination of whether the video image is to be downscaled or upscaled. The one or more circuits may be operable to downscale the received video image to generate a first scaled video image, and/or upscale the received video image to generate a second scaled video image, based on the selection.
申请公布号 US2009295834(A1) 申请公布日期 2009.12.03
申请号 US20090472235 申请日期 2009.05.26
申请人 BROADCOM CORPORATION 发明人 MACINNIS ALEXANDER G.;TANG CHENGFUH JEFFREY;XIE XIAODONG;PATTERSON JAMES T.;KRANAWETTER GREG A.
分类号 G09G5/00;G06T9/00;G09G1/16;G09G5/02;G09G5/06;G09G5/12;G09G5/14;G09G5/28;G09G5/34;G09G5/36;G09G5/39;G09G5/395;G09G5/42;H04N5/12;H04N5/14;H04N5/44;H04N5/445;H04N5/45;H04N5/46;H04N7/01;H04N7/26;H04N7/50;H04N9/45;H04N9/64;H04N11/14;H04N11/20 主分类号 G09G5/00
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