发明名称 SEMICONDUCTOR DEVICE
摘要 A voltage mitigating element mitigating a voltage applied across a gate insulating film in an off state of an insulated gate bipolar transistor (IGBT) is arranged to a gate electrode node of a P-channel MOS transistor provided for suppressing flow-in of holes at the time of turn-off of the IGBT. Withstanding voltage characteristics are improved and an occupation area thereof is reduced while maintaining switching characteristics and a low on-resistance of an insulated gate bipolar transistor.
申请公布号 US2009294799(A1) 申请公布日期 2009.12.03
申请号 US20080205973 申请日期 2008.09.08
申请人 MITSUBISHI ELECTRIC CORPORATION 发明人 TERASHIMA TOMOHIDE
分类号 H01L29/739;H01L27/06 主分类号 H01L29/739
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