ALTERNATE ADDRESS SPACE TO PERMIT VIRTUAL MACHINE MONITOR ACCESS TO GUEST VIRTUAL ADDRESS SPACE

摘要

In one embodiment, a processor (30) supports an alternate address space during execution of non-guest code (such as a minivisor (172) or a virtual machine monitor (VMM) (18)). The alternate address space may be the guest address space. An instruction in the minivisor ( 172)/VMM (18) may specify the alternate address space for a data access, permitting the minivisor (172) /VMM (18) to read guest memory state via the alternate address space. In another embodiment, a processor (30) may implement a page table base address register (mCR3) dedicated for the minivisor's (172) use. In still another embodiment, the minivisor (172) may be implemented as a specified entry point in the VMM address space (220).