发明名称 CIRCUIT OPERATION VERIFICATION METHOD AND APPARATUS
摘要 In order to confirm a propagation range of a signal whose signal value is fixed by a control signal to restrain switchings is within a predetermined range, it is judged by results of the logic simulation whether or not a switching restraining mode is enabled. If it is enabled, a switching probability restraint information list including the detected time and an ID of the net whose signal value is fixed is set to the net whose signal value is fixed, and then is propagated to the next net according to the results of the logic simulation. If the circuit changes are appropriated conducted, the results of the logic simulation do not satisfy the propagation condition of the switching probability restraint information list. Accordingly, the switching probability restraint information list is not propagated over the predetermined range, and no problem is detected.
申请公布号 US2009300564(A1) 申请公布日期 2009.12.03
申请号 US20090358060 申请日期 2009.01.22
申请人 FUJITSU LIMITED 发明人 KANAZAWA YUZI
分类号 G06F17/50 主分类号 G06F17/50
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