| 摘要 |
Chip scale semiconductor packages and methods for making and using such semiconductor packages are described. The chip scale packages include multiple terminals that are each disposed on a die back surface that is located opposite to an active area of a semiconductor substrate in the package. The active area can be electrically connected to a plurality of terminals by using traces that may be electrically isolated from the die substrate. In some designs, the terminals can comprise a gate terminal that electrically connected with a gate region of the active area, a source terminal electrically connected with a source region of the active area, and a drain terminal may electrically connected with the die substrate. Other embodiments are also described. |
