Signal processing circuit involving local synchronous behaviour

摘要

A local synchronization type parallel pulse signal processing circuit has a plurality of neurons connected to each other based on a predetermined rule and disposed in parallel, executing a predetermined arithmetic process with respect to input signals and outputting, a phase synchronization signal generation circuit outputting phase synchronization signals to the predetermined vicinal neurons, and a synchronization detection portion detecting synchronization within an allowable phase difference between the outputs of the predetermined vicinal neurons. The phase synchronization signal generation circuit functions also as a neuron executing the predetermined arithmetic process and outputting in accordance with a result of the synchronization detection by the synchronization detection portion. With this architecture, the synchronization circuit operating stably without any contradiction in a way that brings neither an increase in circuit scale nor an increase in consumption of electric power, is actualized.