发明名称 METHOD OF FORMING AN ISOLATION LAYER IN SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a device isolation layer of a semiconductor device is provided to suppress the lowering of a coupling ratio due to the decrease of the area of a floating gate by forming a linear insulation layer with a dual structure stacking a HTO(High Temperature Oxide) layer and a nitride layer in the sidewall of a conductive layer. CONSTITUTION: A trench is formed in a device isolation region of a semiconductor substrate(100) by an etching process using a device isolation mask. A trench is filled by forming a sidewall oxide layer(114), a first liner insulation layer(116), a second liner insulation layer(118), and a first insulation layer successively. A part of the first insulation layer remains in the lower part of the trench by etching the first insulation layer. The trench is filled by forming a second insulation layer and a third insulation layer on the remaining first insulation layer and second liner insulation layer. The third insulation layer is removed. The trench is filled by forming a fourth insulation layer(128) on the remaining second insulation layer.
申请公布号 KR20090123505(A) 申请公布日期 2009.12.02
申请号 KR20080049627 申请日期 2008.05.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JEONG, WOO RI
分类号 H01L21/76 主分类号 H01L21/76
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