发明名称 SEMICONDUCTOR DEVICE AND TEST METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To accurately test a semiconductor device only by the simple circuit alteration by selecting whether a test pattern is inputted or not, inputting prescribed data to a selected wiring and outputting prescribed data to the selected wiring. SOLUTION: A test pattern input terminal selection means 1 selects whether test patterns which are previously decided for the input/output terminal parts I/O0-I/O3 of plural wring groups BL are inputted to bit wiring groups BL0-BL3 or the inverse of BL0-BL3 or not. A physical pattern generation means 2 inputs prescribed data to a selected wiring, outputs prescribed data to a connected writing data bus WBST0 and simultaneously outputs data which is previously decided on other plural data buses WBST1-WBST3. An input buffer means 3 and a latch means 4 have constitutions different from an input buffer 3 and a latch means 4, which are connected to the wiring groups WBST1-WBST3 or WBSN1-WBSN3.
申请公布号 JP2000182398(A) 申请公布日期 2000.06.30
申请号 JP19980355705 申请日期 1998.12.15
申请人 NEC CORP 发明人 SHIBATA KAYOKO
分类号 G01R31/28;G11C11/401;G11C11/407;G11C29/34;G11C29/40;H01L21/66;(IPC1-7):G11C29/00 主分类号 G01R31/28
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