发明名称 Apparatus for jitter testing an IC
摘要 An integrated circuit tester channel includes an integrated circuit (IC) for adding a programmably controlled amount of jitter to a digital test signal to produce a DUT input signal having a precisely controlled jitter pattern. The IC also measures periods between selected edges of the same or different ones of the DUT output signal, the DUT input signal, and a reference clock signal. Additionally, when the DUT input and output signals convey repetitive patterns, the IC can measure the voltage of the DUT input out output signal as selected points within the pattern by comparing it to an adjustable reference voltage. Processing circuits external to the IC program the IC to provide a specified amount of jitter to the test signal, control the measurements carried out by the measurement circuit, and process measurement data to determine the amount of jitter and other characteristics of the DUT output signal, and to calibrate the jitter in the DUT input signal.
申请公布号 US7627790(B2) 申请公布日期 2009.12.01
申请号 US20040992955 申请日期 2004.11.18
申请人 CREDENCE SYSTEMS CORPORATION 发明人 FRISCH ARNOLD M.;ALMY THOMAS ARTHUR
分类号 G06K5/04;G01R29/26;G01R31/28;G01R31/317;G01R31/3185;G01R31/319;G04F1/00;G04F3/00;G04F5/00;G04F7/00;G04F8/00;G04F10/00;G04G5/00;G04G7/00;G04G15/00;G06F11/00;H03H11/26;H03L7/00;H04B3/46;H04B17/00;H04L7/00;H04L25/00;H04L25/40;H04Q1/20 主分类号 G06K5/04
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