发明名称 Method of detecting the relative positioning of two signals and corresponding device
摘要 A device is for detecting a relative positioning of two clock signals including a fast clock signal and a slow clock signal. The fast clock frequency may be n times greater than a slow clock frequency, and n includes an integer greater than 1. The device includes a phase logic signal generator for generating a phase logic signal from the two clock signals by assigning a predetermined logic value to the phase logic signal when a rising edge of the fast clock signal matches a predetermined location of the slow clock signal.
申请公布号 US7627070(B2) 申请公布日期 2009.12.01
申请号 US20050222412 申请日期 2005.09.08
申请人 STMICROELECTRONICS SA 发明人 CAUCHY XAVIER;SALVAIRE ERIC;FORCE CEDRIC
分类号 H03D3/24;H03K5/26;H03K19/096;H04J3/04;H04L7/00;H04L7/02;H04N7/62 主分类号 H03D3/24
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