CIRCUIT CONFIGURATION, FOR ENCODING OR DECODING PROCESSING, WITH ERROR DETECTION FUNCTION

摘要

PROBLEM TO BE SOLVED: To provide a circuit configuration which surely performs error detection when operating an encoding/decoding circuit, and reduces the penalty in circuit scale and operating speed. SOLUTION: While encoding process is executed on a certain stage, decoding processing is executed in parallel on the pre-stage as a verification of the encoding processing in the preceding cycle. Decoded data are compared with data to be encoded in the preceding cycle, and it is investigated whether the data are matched or not. In the next cycle, data encoded first on the relevant stage are decoded and it is investigated whether the data are matched with data before encoding or not. In parallel, encoding processing is advanced on the next stage for the data encoded first, new data are input to the pre-stage, and encoding processing is performed thereon. COPYRIGHT: (C)2010,JPO&INPIT