发明名称 POWER EFFICIENT METHOD FOR CONTROLLING AN OSCILLATOR IN A LOW POWER SYNCHRONOUS SYSTEM WITH AN ASYNCHRONOUS I2C BUS
摘要 In a method and apparatus for saving power in a device coupled to a bus, the device is placed to operate in a power saving mode by powering off a selective portion of the device including a device clock. If data communication over the bus is addressed to the device then the selective portion of the device, including the device clock, is triggered to return to a power on state from the power off state. The data communication is stored in shadow registers using a bus clock while the device clock is transitioning to the power on state. The data communication stored in the shadow registers is transferred to a register map under the control of the device clock operating in the power on state. Upon completion of the transfer of the data communication to the register map, the device is returned to operate in the power saving mode.
申请公布号 US2009292840(A1) 申请公布日期 2009.11.26
申请号 US20080126049 申请日期 2008.05.23
申请人 KONNAIL GEORGE VINCENT;MOUNGER ROBERT WAYNE;SANTOS JOSE VICENTE;SINGH SANJAY PRATAP 发明人 KONNAIL GEORGE VINCENT;MOUNGER ROBERT WAYNE;SANTOS JOSE VICENTE;SINGH SANJAY PRATAP
分类号 G06F1/32;G06F12/02;G06F13/20 主分类号 G06F1/32
代理机构 代理人
主权项
地址
您可能感兴趣的专利