发明名称 |
Flash memory with less susceptibility to charge gain and charge loss |
摘要 |
An integrated circuit is designed to reduce charge gain and charge loss in a flash memory or flash programmable read-only memory. Charge gain and loss caused by moisture or hydrogen diffusion or alternately small contact-to-floating gate distance is reduced by a capping layer disposed over a gate stack and a base layer of the flash memory. The capping layer includes a buffer layer, a first insulative layer, and a second insulative layer. The etch characteristics of at least the first and second insulative layer differs from an interlevel dielectric to control the dimensions of a contact extending through the interlevel dielectric and the capping layer to the base layer. |
申请公布号 |
US6486506(B1) |
申请公布日期 |
2002.11.26 |
申请号 |
US20000532293 |
申请日期 |
2000.03.23 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
PARK STEPHEN KEETAI;SHIELDS JEFFREY A. |
分类号 |
H01L21/8247;H01L23/00;H01L23/31;H01L27/115;H01L29/423;(IPC1-7):H01L29/72 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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