| 摘要 |
PURPOSE: A semiconductor device is provided to reduce the layout area that a bit line sense amplifier occupies in a semiconductor chip. CONSTITUTION: A pair of first bit lines are connected between a first cell array and a second cell array, and a pair of second bit lines are connected between a third cell array and a fourth cell array. A first pull-up unit(135) is formed on an N type well region between the first cell array and the second cell array, and is connected to the pair of the first bit lines. The second pull-up unit(140) is formed, neighboring the first pull-up unit in the N type well region. A first pull-down unit(145) is formed in a P type region between the second cell array and the third cell array, and a second pull-down unit(150) is adjacent to the first pull-down unit in the P type well region. |
