发明名称 LAYOUT METHOD OF GLOBAL SIGNAL LINE
摘要 PURPOSE: A layout method of a global signal line is provided to increase the layout area efficiency in a semiconductor memory device by distributing global signal lines through the use of a peripheral circuit region or a region adjacent to a peripheral circuit region. CONSTITUTION: A layout method of a global signal line comprises the steps of: arranging some global signal lines(GIO) in a peripheral circuit region; and distributing and arranging the rest one in a certain region which is identical to a layer of the peripheral circuit region, wherein global signal lines are arranged at the peripheral circuit region.
申请公布号 KR20090121471(A) 申请公布日期 2009.11.26
申请号 KR20080047392 申请日期 2008.05.22
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, SUNG JIN
分类号 G11C7/10;G11C7/18;G11C8/14 主分类号 G11C7/10
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