发明名称 Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells
摘要 In a method for manufacturing a memory cell of a nonvolatile semiconductor memory, a floating gate, first insulating film and control gate are successively stacked on a tunnel oxide film formed on a substrate of the nonvolatile semiconductor memory. The control gate, the first insulating film and the floating gate are patterned in stripes. Subsequently, a damaged portion of the tunnel oxide film immediately below a sidewall of the floating gate is removed by isotropic etching. A second insulating film is deposited to cover the control gate, sidewalls of the first insulating film, the floating gate and the tunnel oxide film. Thereby, a variation in threshold voltages between memory cells is suppressed.
申请公布号 US2004183120(A1) 申请公布日期 2004.09.23
申请号 US20040814241 申请日期 2004.04.01
申请人 SHARP KABUSHIKI KAISHA 发明人 YAMAGATA SATORU;YOSHIMI MASANORI
分类号 H01L21/8247;H01L21/28;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/336 主分类号 H01L21/8247
代理机构 代理人
主权项
地址