发明名称 ENHANCED STRESS FOR TRANSISTORS
摘要 <p>A transistor disposed on a substrate includes a gate, spacers on gate sidewalls, and diffusion regions adjacent to the gate. Silicide contacts on the diffusion regions are displaced from the spacers by a distance G. Stressors may be provided in the diffusion region to induce a first stress in the channel region of the transistor. Figure la</p>
申请公布号 SG156582(A1) 申请公布日期 2009.11.26
申请号 SG20090024985 申请日期 2009.04.14
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING LTD 发明人 WEE TEO LEE;GON LEE JAE;SENG TAN SHYUE;QUEK ELGIN
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