COG PANEL SYSTEM ARRANGEMENT

摘要

Disclosed is a COG panel system arrangement for minimizing block dim taking into account the correlations between a plurality of chips. The COG panel system arrangement comprises: an FPC for supplying at least two electric power supplies of predetermined voltage level, at least one block dim compensation resistor and a plurality of SDICs for dividing and generating a plurality of continuous LCD drive signals required for an artibrary line of an LCD, jointly supplied with a bypass electric supply which is supplied from the FPC.