发明名称 |
SEMICONDUCTOR DEVICE PATTERN VERIFICATION METHOD, SEMICONDUCTOR DEVICE PATTERN VERIFICATION PROGRAM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD |
摘要 |
Information on a transfer pattern created from a design pattern corresponding to a pattern to be formed on a substrate is acquired as pattern transfer information. The design pattern is compared with the transfer pattern and, on the basis of the feature quantity obtained from the comparison, the pattern transfer information and the design pattern are classified. A threshold value is set for the feature quantity and, on the basis of the threshold value, the pattern transfer information and the design pattern are further classified. Then, verification is conducted to see if the transfer pattern satisfies the threshold value.
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申请公布号 |
US2009291512(A1) |
申请公布日期 |
2009.11.26 |
申请号 |
US20090470289 |
申请日期 |
2009.05.21 |
申请人 |
IZUHA KYOKO;TANAKA SATOSHI |
发明人 |
IZUHA KYOKO;TANAKA SATOSHI |
分类号 |
H01L21/66;G03F1/36;G03F1/68;G03F1/70;G03F1/84;G06F17/50;H01L21/027 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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