发明名称 CIRCUIT AND METHOD OF MEASURING DIGITAL SIGNAL DELAY
摘要 PROBLEM TO BE SOLVED: To provide a circuit and a method of measuring a digital signal delay for measuring true delay time of a digital circuit with influence of a dynamic IR-Drop taken into consideration. SOLUTION: The circuit of measuring the digital signal delay for measuring a delay time of a digital signal for a circuit capable of scan test includes an output means for outputting a delay time measuring signal, a delay means for delaying timing when a state of the delay time measuring signal varies, and at least two or more signal holding means for inputting the delay time measuring signal and keeping the state of the delay time measuring signal at the timing of inputting a holding instruction. The input timing of the holding instruction is the same for the respective signal holding means. In addition, the timing when the state of the delay time measuring signal input to the respective holding means varies differs among the delay means. The delay time is obtained based on the difference in state of the delay time measuring signals held by the respective holding means. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009276301(A) 申请公布日期 2009.11.26
申请号 JP20080130151 申请日期 2008.05.16
申请人 DAINIPPON PRINTING CO LTD 发明人 YAMAOKA KENSUKE
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址