发明名称 METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method and system for manufacturing a semiconductor device, wherein resist size and shape variances caused by exposure process variation are reduced without performing inspection operation in advance in exposure processing for manufacture of the semiconductor device. <P>SOLUTION: In an exposure step of forming a predetermined circuit pattern of the semiconductor device on a wafer, a past resist size of a resist pattern formed on a wafer and a past focus position in exposure processing are measured, a resist size of a wafer to be subjected to the exposure processing and a focus position are estimated using measurement results of the measured resist size and focus position, and after a focus correction value is calculated using estimated values of the estimated resist size and focus position, an exposure amount is calculated taking the focus correction value into consideration, thereby forming the resist pattern on the wafer to be subjected to the exposure processing using the calculated exposure amount and focus correction value. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009277957(A) 申请公布日期 2009.11.26
申请号 JP20080129120 申请日期 2008.05.16
申请人 RENESAS TECHNOLOGY CORP 发明人 MIWA TOSHIHARU;KONISHI JUNKO;KAWACHI TOSHIHIDE;YAMASHITA SHIGENORI;TASHIRO TAKESHI;FUDO HIDEKIMI
分类号 H01L21/027;G03F7/20 主分类号 H01L21/027
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