发明名称 Dual Stress Liner Device and Method
摘要 A dual stress liner manufacturing method and device is described. Overlapping stress liner layers of opposite effect (e.g., tensile versus compression) may be deposited over portions of the device, and the uppermost overlapping layer may be polished down in a process that uses the bottom overlapping layer as a stopper. An insulating film may be deposited on the stress liner layers before the polishing, and another insulating film may be deposited above the first insulating film after the polishing. Contacts may be formed such that the contacts need only penetrate one stress liner layer to reach a transistor well or gate structure.
申请公布号 US2009289375(A1) 申请公布日期 2009.11.26
申请号 US20090534983 申请日期 2009.08.04
申请人 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 发明人 SUDO GAKU
分类号 H01L23/48 主分类号 H01L23/48
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