发明名称 |
Fabrication of three dimensional integrated circuit employing multiple die panels |
摘要 |
A method of assembling an electronic device includes testing a first wafer of first die to identify the location of functional first die and dividing the first wafer into a set of panels, wherein a panel includes an MxN array of first die. A panel is bonded to a panel site of a second wafer to form a panel stack wherein a panel site defines an MxN array of second die in the second wafer. The panel stack is sawed into a devices comprising a first die bonded to a second die. Dividing the first wafer into panels may be done according statically or dynamically (to maximize the number of panels having a yield exceeding a specified threshold). Binning of the panels and panel sites according to functional die patterns may be performed to preferentially bond panels to panel sites of the same bin.
|
申请公布号 |
US7622313(B2) |
申请公布日期 |
2009.11.24 |
申请号 |
US20050193926 |
申请日期 |
2005.07.29 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
JONES ROBERT E.;POZDER SCOTT K. |
分类号 |
H01L21/00;B29C65/00 |
主分类号 |
H01L21/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|