| 摘要 |
Input average levels and output average levels of digital channel filters 217 and 218 are computed in amplitude calculation circuits 101 and 102. In a gain difference calculation circuit 103, a gain difference of the input levels and the output levels is computed as a multiplier alpha so that a difference between the input levels and the output levels are eliminated or adjusted to be within a certain value. The outputs of the digital channel filters 217 and 218 are multiplied by the multiplier alpha in multiplier units 104 and 105. The multiplication results are outputted as corrected digital signals to a subsequent digital signal processing circuit.
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