High speed current mode computer bus system - has transmission lines for coupling master current mode bus drivers to slave bus receivers having sampling and amplifying circuit stages

摘要

The system consists of a bus which is configured to have all master devices clustered at an unterminated end of the bus. The slaves are located along the remaining length of the bus and the opposite end of the transmission line of the bus is terminated. The termination resistor at the end of the bus where the master devices are located is eliminated to reduce the drive current needed to produce a given output swing. The bus input receiver comprises a two stage buffered sampler and amplifier which receives a small swing signal from the bus and samples and amplifies the low swing signal to a full swing signal within a clock cycle using CMOS circuits.