发明名称 COMPENSATION FOR DEGRADATION OF TEST SIGNAL DUE TO DUT FAULT
摘要 PROBLEM TO BE SOLVED: To provide a system for compensating the degradation of a test signal. SOLUTION: A device is provided for simultaneously supplying a test signal to a plurality of IC terminals of an IC circuit during testing the integrated circuit (IC). An electronic device tester channel supplies a single test signal to a plurality of terminals of electronic devices of under test (DUTs) through a set of isolation resisters. The tester channel employs feedback to automatically adjust the test signal voltage to compensate for affects of faults at any of the DUT terminals to prevent the faults from substantially affecting the test signal voltage. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009271088(A) 申请公布日期 2009.11.19
申请号 JP20090189565 申请日期 2009.08.18
申请人 FORMFACTOR INC 发明人 CHARLES MILLER A
分类号 G01R31/28;G01R31/00;G01R31/26;G01R31/317;G01R31/319 主分类号 G01R31/28
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