发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD AND PROGRAM FOR DESIGNING IT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method and the like for designing a semiconductor integrated circuit capable of reducing IRDrop, EMI, etc. <P>SOLUTION: The method for designing a semiconductor integrated circuit includes: a step for grouping a plurality of leaf cells into a plurality of groups; a step for providing a representative cell as an entrance for clock signals for each of the plurality of groups; a step for arranging the representative cell and the leaf cells within a group arrangement area for each of the plurality of groups in such a manner that the delays of clock signals between the representative cell and the leaf cells are approximately equal; a step for arranging the plurality of groups within a layout area; and a step for performing clock tree synthesis between a clock route cell for supplying clock signals to the plurality of groups and the representative cell within the plurality of groups. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2009271699(A) 申请公布日期 2009.11.19
申请号 JP20080121127 申请日期 2008.05.07
申请人 SEIKO EPSON CORP 发明人 FUNAZAKI KENJI
分类号 G06F17/50;G06F1/10;H01L21/82 主分类号 G06F17/50
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