LAYOUT DESIGN DEVICE, LAYOUT DESIGN PROGRAM, AND RECORDING MEDIUM

摘要

<P>PROBLEM TO BE SOLVED: To suppress useless power consumption of an LSI chip and to shorten a layout design period. Ž<P>SOLUTION: A dummy FF 701 is arranged at an unarranged position 511. The dummy FF 701 is a bypass element which bypasses between FFs 504 and 505 arranged adjacently to the unarranged position 511 to propagate a scan signal and does not perform signal processing as other FFs 501 to 508 do. This arrangement processing can connect a divided scan signal line 500 by the dummy FFs 701 and 702. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž