| 摘要 |
<P>PROBLEM TO BE SOLVED: To achieve an information processing apparatus for efficiently executing the switching of the possibility/impossibility of cache control for the same variables on a memory without accessing a cache control register. Ž<P>SOLUTION: First and second memory addresses are allocated to a variable-storage region in a memory 15 for storing an entity of one variable. When a memory address included in a memory access request from a CPU 11 is the first memory address, a cache control part 14 executes access to the memory 15 by turning off cache control, and when the memory address included in the memory access request is the second memory address, turns on cache control to execute access to the cache 113. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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