发明名称 SEMICONDUCTOR MEMORY APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus that allocates different read or write operating time to each bank that have different response speeds. SOLUTION: The semiconductor memory apparatus includes an active signal generation unit that generates a plurality of active signals, having different enable timings in response to a refresh signal, a pre-charge signal generation unit that delays at least one of the active signals to generate at least one pre-charge signal for enabling at least two equalizer signals, at the same time, and a sense amplifier driver control unit that generates the plurality of equalizer signals for controlling individual sense amplifier drivers, in response to the plurality of active signals and the pre-charge signal. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008097806(A) 申请公布日期 2008.04.24
申请号 JP20070226776 申请日期 2007.08.31
申请人 HYNIX SEMICONDUCTOR INC 发明人 KANG KHIL-OHK
分类号 G11C11/4076;G11C11/401 主分类号 G11C11/4076
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