发明名称 MEMORY INTERFACE CIRCUIT AND MEMORY SYSTEM INCLUDING THE SAME
摘要 PURPOSE: A memory interface circuit and a memory system including the same capable of reducing power consumption and the space of the semiconductor chip are provided to reduce power consumption and the space of the semiconductor chip by reducing the number of clocked loops. CONSTITUTION: A memory interface circuit and a memory system including the same capable of reducing power consumption and the space of the semiconductor chip include a master delay unit(1100) and a slave delay unit(1200). The master delay unit provides the control signal in which controls the unit delay based on the clock signal. The slave delay unit selects the inverted signal and data strobe signal.
申请公布号 KR20090118603(A) 申请公布日期 2009.11.18
申请号 KR20080044487 申请日期 2008.05.14
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHAE, KWAN YEOB
分类号 G11C11/407;G11C11/4076 主分类号 G11C11/407
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