发明名称
摘要 <p><P>PROBLEM TO BE SOLVED: To control a period of a pixel clock through detailed steps by using a simple constitution. <P>SOLUTION: This pixel clock generator comprises: a multiphase high-frequency clock generating means for generating a multiphase high-frequency clock; a selection signal generating means for generating a selection signal which indicates which of the multiphase high-frequency clocks should be selected, in accordance with phase data indicating the period of the pixel clock; a clock selecting means for selecting any one of the multiphase high-frequency clocks in accordance with the selection signal; and a clock frequency-dividing means for generating the pixel clock by dividing the frequency of the high-frequency clock selected by the clock selecting means. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP4367840(B2) 申请公布日期 2009.11.18
申请号 JP20040047075 申请日期 2004.02.23
申请人 发明人
分类号 B41J2/44;G02B26/10;G06F1/04;G06F1/06;H04N1/036;H04N1/113 主分类号 B41J2/44
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