发明名称 |
PROCESSOR WITH RECONFIGURABLE FLOATING POINT UNIT |
摘要 |
A technique of operating a processor (100) includes determining whether a floating point unit (FPU) (120) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into a single operation, when the full-bit mode is indicated, or multiple operations, when the reduced-bit mode is indicated. |
申请公布号 |
KR20090118985(A) |
申请公布日期 |
2009.11.18 |
申请号 |
KR20097019832 |
申请日期 |
2008.02.28 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
AHMED ASHRAF;GOVEAS KELVIN DOMNIC;CLARK MICHAEL;ILIC JELENA |
分类号 |
G06F9/30;G06F7/483;G06F9/302 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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