发明名称 Fin transformation process and isolation structures facilitating different Fin isolation schemes
摘要 Methods and semiconductor structures formed from the methods are provided which facilitate fabricating semiconductor fin structures. The methods include, for example: providing a wafer with at least one semiconductor fin extending above a substrate; transforming a portion of the semiconductor fin(s) into an isolation layer, the isolation layer separating a semiconductor layer of the semiconductor fin(s) from the substrate; and proceeding with forming a fin device(s) of a first architectural type in a first fin region of the semiconductor fin(s), and a fin device(s) of a second architectural type in a second fin region of the semiconductor fin(s), where the first architectural type and the second architectural type are different fin device architectures.
申请公布号 US9349730(B2) 申请公布日期 2016.05.24
申请号 US201313945415 申请日期 2013.07.18
申请人 GLOBALFOUNDRIES INC.;STMICROELECTRONICS, INC. 发明人 Jacob Ajey Poovannummoottil;Cheng Kangguo;Doris Bruce B.;Loubet Nicolas;Khare Prasanna;Divakaruni Ramachandra
分类号 H01L21/20;H01L27/088;H01L21/84;H01L27/12;H01L21/02 主分类号 H01L21/20
代理机构 Heslin Rothenberg Farley & Mesiti P.C. 代理人 Heslin Rothenberg Farley & Mesiti P.C. ;Ziegler Kristian E.
主权项 1. A method comprising: facilitating fabricating semiconductor fin structures, the facilitating fabricating comprising: providing a wafer with at least one semiconductor fin extending above a substrate;transforming a lower portion of the at least one semiconductor fin into an isolation layer, the isolation layer being disposed between and separating an upper portion of the at least one semiconductor fin from the substrate, wherein the upper portion of the at least one semiconductor fin comprises a semiconductor layer;dividing the at least one semiconductor fin transversely into a first fin region and a second fin region, each of the first fin region and the second fin region including a respective portion of the upper portion and the isolation layer of the at least one semiconductor fin; andproceeding with forming at least one fin device of a first architectural type in the first fin region of the at least one semiconductor fin and at least one fin device of a second architectural type in the second fin region of the at least one semiconductor fin, wherein the first architectural type and the second architectural type comprise different fin device architectures.
地址 Grand Cayman KY