Wafer thinning endpoint detection for TSV technology

摘要

Embodiments of the present invention provide an apparatus and method for wafer thinning endpoint detection. Embodiments of the present invention utilize through silicon via (TSV) structures formed in the wafer. A specially made wafer handle is bonded to the wafer. Conductive slurry is used in the wafer backside thinning process. The wafer handle provides electrical connectivity to an electrical measurement tool, and conductive posts in the wafer handle are proximal to a test structure on the wafer. A plurality of electrically isolated TSVs is monitored via the electrical measurement tool. When the TSVs are exposed on the backside as a result of thinning, the conductive slurry shorts the electrically isolated TSVs, changing the electrical properties of the plurality of TSVs. The change in electrical properties is detected and used to trigger termination of the wafer backside thinning process.

主权项

1. A method of backside thinning endpoint detection, comprising:
applying a bonding layer to a semiconductor wafer; attaching a wafer handle to the semiconductor wafer using the bonding layer, wherein the wafer handle comprises: a non-conductive substrate; a first conductive post traversing the non-conductive substrate; a second conductive post traversing the non-conductive substrate; periodically performing a measurement of an electrical parameter using the wafer handle while performing a wafer backside thinning process, wherein the backside thinning process utilizes a conductive slurry; terminating the wafer backside thinning process in response to detection of a change in the measured electrical parameter; and wherein the semiconductor wafer comprises a plurality of test structures, and wherein the wafer handle comprises a plurality of conductive posts spatially corresponding to the plurality of test structures, the method further comprising:
determining which of the plurality of test structures is the last to undergo a parameter shift; andapplying a pressure correction for the wafer backside thinning process in response to the determination of the last test structure of the plurality of test structures to undergo a parameter shift.