发明名称 Latency tolerant pipeline synchronization
摘要 A synchronization mechanism is used to synchronize events across multiple execution pipelines that process transaction streams. A common set of state configuration is included in each transaction stream to control processing of data that is distributed between the different transaction streams. Portions of the state configuration correspond to portions of the data. Execution of the transaction streams is synchronized to ensure that each portion of the data is processed using the state configuration that corresponds to that portion of the data. The synchronization mechanism may be used for multiple synchronizations and when the synchronization signals are pipelined to meet chip-level timing requirements.
申请公布号 US7620798(B1) 申请公布日期 2009.11.17
申请号 US20060554511 申请日期 2006.10.30
申请人 NVIDIA CORPORATION 发明人 FRENCH MARK J.;MOLNAR STEVEN E.
分类号 G06F9/38 主分类号 G06F9/38
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