发明名称 Cache line replacement with zero latency
摘要 A method for cache management includes assigning a respective cache line in a cache of a processing device to each of a plurality of processing flows in the processing device, and loading respective context data relating to each of the processing flows from a memory into the respective cache line that is assigned thereto. Respective activity levels of the processing flows are monitored. Responsively to detecting an absence of activity of a processing flow, and prior to receiving a request to overwrite the cache line, the context data are written back to the memory from the respective cache line that is assigned to the processing flow.
申请公布号 US7620057(B1) 申请公布日期 2009.11.17
申请号 US20050253397 申请日期 2005.10.18
申请人 BROADCOM CORPORATION 发明人 ALONI ELI;SHALOM RAFI
分类号 H04L12/28;H04L12/56 主分类号 H04L12/28
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