发明名称 DELTA SIGMA-TYPE A/D CONVERTER
摘要 <P>PROBLEM TO BE SOLVED: To provide a technique for reducing the adverse effect of idle tones in the channels in a Delta Sigma-type A/D converter including a plurality of channels for converting analog input signals into digital signals. Ž<P>SOLUTION: The Delta Sigma-type A/D converter includes an L channel Lch for converting a left analog input signal AINL into a digital signal and an R channel Rch for converting a right analog input signal AINR into a digital signal. Each of the L channel Lch and the R channel Rch includes a DC dither circuit 115 for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel Lch and the R channel Rch, DC addition voltages generated by DC dither circuits 115 are different from each other. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009267698(A) 申请公布日期 2009.11.12
申请号 JP20080113932 申请日期 2008.04.24
申请人 RENESAS TECHNOLOGY CORP 发明人 KUMAMOTO TOSHIO;OKUDA TAKASHI;SENGOKU TATSUO;KITAGUCHI TORU
分类号 H03M3/02 主分类号 H03M3/02
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