| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a CABAC decoding apparatus comprising a register configuration matched to a process mode of a syntax element for CABAC decoding processing. <P>SOLUTION: A register file 120 is provided with: totally eight 128-bit width registers of four arithmetic registers (CV0 to CV3) and four evacuation registers (CV4 to CV7). The arithmetic register is directly connected to a CABAC decoding computing element 110 and a context parameter held in the arithmetic register is supplied to the CABAC decoding computing element 110. By providing the four arithmetic registers, processing over all the CABAC decoding is efficiently performed. Since the context parameter of the syntax element decoded in the first half is evacuated from the arithmetic register to the evacuation register, CABAC decoding processing is progressed without performing load processing or store processing into a main memory 300. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
