发明名称 THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To improve read disturb of a BiCS (Bit Cost Scalable) memory. SOLUTION: In a three dimensional stacked nonvolatile semiconductor memory, a first block has a selected first cell unit including a memory cell to be read and a non-selected second cell unit not including a memory cell to be read. A read potential Vcgrv or a transfer potential Vread higher than the read potential is applied to the word lines WL<0>, WL<1>, WL<2>, WL<3> in the first block in a state that a ground potential is applied to a channel of a memory cell existing nearer to the bit line side BL<0>, BL<1> than a memory cell in the second cell unit to which the read potential Vcgrv is applied, after which all the memory cells in the second cell unit are cut off from the bit lines BL<0>, BL<1>, the bit lines BL<0>, BL<1> is set to a precharge potential, and read is performed to the memory cells to be read in the first cell unit. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009266281(A) 申请公布日期 2009.11.12
申请号 JP20080112660 申请日期 2008.04.23
申请人 TOSHIBA CORP 发明人 MAEJIMA HIROSHI
分类号 G11C16/02;G11C16/04;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/02
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