发明名称 SYSTEM STABILIZING DEVICE
摘要 <p>The control unit of the system stabilizing device uses a fluctuation detecting block (70A) for determining a fluctuation component in the active component/reactive component current of the system. The high frequency side cutoff frequency of the fluctuation detecting block (70A) is (f1) and the low frequency side cutoff frequency is (f2). The time constant of a noise removal low-pass filter with cutoff frequency (f1) is (T1), and the time constant of a low-pass filter with cutoff frequency (f2) for setting the fluctuation detection period is (T2). The fluctuation detecting block (70A) is configured with a low-pass filter (71) with a first-order lag characteristic having (T1) as the time constant, a low-pass filter (72) with a first-order lag characteristic having (T2) as the time constant, a subtractor (73) that subtracts and outputs the output signals of filters (71, 72), an amp (74) that amplifies the output of the subtractor (73), a rating limiter (75) that limits the amp output, and an overcompensation inhibiting part (200) that changes (T4) to a smaller value when the rating limiter (75) is activated.</p>
申请公布号 WO2009136639(A1) 申请公布日期 2009.11.12
申请号 WO2009JP58701 申请日期 2009.05.08
申请人 MEIDENSHA CORPORATION;OI KAZUNOBU;MUNESHIMA MASAKAZU;MURAI TAKAHIRO 发明人 OI KAZUNOBU;MUNESHIMA MASAKAZU;MURAI TAKAHIRO
分类号 H02J3/24;H02J3/32;H02J3/38 主分类号 H02J3/24
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