发明名称 SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device which accurately detects, for example, a short circuit failure by applying stress between two bit lines connected to adjacent two memory cells. SOLUTION: The semiconductor memory device has a memory cell array 10 which has a plurality of memory cells MC, a sense amplifier row 11(E) which includes a sense amplifier 20 connected to a predetermined bit line BLx, a sense amplifier row 11(O) which includes the sense amplifier 20 connected to an adjacent bit line BLy, a potential supplying circuit which supplies a predetermined potential to each bit line BL connected to the sense amplifier rows 11, and a sense amplifier control circuit which controls operation of the sense amplifier rows 11(E) and 11(O) independently. The sense amplifier control circuit performs control to stop the operation of one of the sense amplifier rows 11(E) and 11(O) and operate the other one while the predetermined potential is supplied to the bit line BL connected to each sense amplifier 20 to apply stress. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009266300(A) 申请公布日期 2009.11.12
申请号 JP20080114680 申请日期 2008.04.24
申请人 ELPIDA MEMORY INC 发明人 KUBONAI SHUICHI;SUZUKI ATSUSHI
分类号 G11C29/06;G11C11/401 主分类号 G11C29/06
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