发明名称 |
Activation of CMOS source/drain extensions by ultra-high temperature anneals |
摘要 |
A method of manufacturing a semiconductor device that includes forming a gate dielectric layer over a semiconductor substrate. A gate electrode is formed over the gate dielectric layer. A dopant is implanted into an extension region of the substrate, with an amount of the dopant remaining in a dielectric layer adjacent the gate electrode. The substrate is annealed at a temperature of about 1000° C. or greater to cause at least a portion of the amount of the dopant to diffuse into the semiconductor substrate.
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申请公布号 |
US7615458(B2) |
申请公布日期 |
2009.11.10 |
申请号 |
US20070764980 |
申请日期 |
2007.06.19 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
JAIN AMITABH;MEHROTRA MANOJ |
分类号 |
H01L21/331 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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