发明名称 |
Nonvolatile Memory, Verify Method Therefor, and Semiconductor Device Using the Nonvolatile Memory |
摘要 |
Provided is a nonvolatile memory that realizes a high-speed verify operation. During verify writing/erasing, the writing/erasing and reading are performed at the same time. As to a circuit that performs a verify operation, for instance, there is obtained a construction where the output from a sense amplifier (102) that performs reading is connected to a switch which switches an operation voltage applied to a memory cell in accordance with a verify signal Sv, and the verify operation is finished concurrently with having the verify signal Sv switched. By obtaining such circuit construction and simultaneously performing writing/erasing and reading, it becomes possible to perform high-speed verify writing/erasing.
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申请公布号 |
US2009273974(A1) |
申请公布日期 |
2009.11.05 |
申请号 |
US20090500846 |
申请日期 |
2009.07.10 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
KATO KIYOSHI |
分类号 |
G11C16/02;G11C16/04;G11C16/06;G11C16/34 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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