发明名称 REDUCTION OF FORMING VOLTAGE IN SEMICONDUCTOR DEVICES
摘要 This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (RRAM) that use techniques to provide a memory device with more predictable operation. In particular, forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or through the use of an anneal in a reducing environment. One or more of these techniques may be applied, depending on desired application and results.
申请公布号 US2009272962(A1) 申请公布日期 2009.11.05
申请号 US20090391784 申请日期 2009.02.24
申请人 发明人 KUMAR PRAGATI;WANG YUN;PHATAK PRASHANT;CHIANG TONY P.
分类号 H01L45/00;H01L21/28 主分类号 H01L45/00
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