| 摘要 |
PROBLEM TO BE SOLVED: To provide a test technique which eliminates the need to provide an exclusive test terminal to avoid a cost increase in a chip and can, when a normal terminal is configured so as to also function as a test terminal, avoid the prolongation of the entire test time caused by the inability to perform a test such as a DC test on the dual-purpose terminal. SOLUTION: The semiconductor integrated circuit with a built-in timer comprises a timer circuit (14), external terminals (TH, PROG) to which only voltage within a predetermined range lower than power supply voltage in the normal operating state is applied, and a test mode determination circuit (16) having a level determination means (INV1) which is connected to the external terminals and can determine that voltage with a level of not less than a predetermined level or a level of not more than the predetermined level has been applied. When the level determination means determines that voltage which is not applied in the normal operating state is applied to the external terminals, a test mode for inspecting the timer circuit is set. COPYRIGHT: (C)2010,JPO&INPIT
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