| 摘要 |
An integrated circuit (100) and a test method are disclosed. The IC (100 comprises a plurality of interconnections (120); and a test arrangement comprising a test access port (170) and a shift register (130) comprising a plurality of cells (132), each coupled to a respective interconnection (120) via at least one signal driver (203, 204, 205), the test arrangement further comprising a further shift register (140) comprising a plurality of cells (142) each coupled to a control terminal of a respective one of said signal drivers (203, 204, 205). This facilitates automated DC parametric testing of the interconnects (120) by shifting appropriate configuration data into the shift register (130) and the further shift register (140) respectively. |
