发明名称 OUTPUT CIRCUIT
摘要 PURPOSE: An output circuit is provided to reduce jitter due to the limit of a swing width of an output signal with a shifted level by reducing the swing width of the output signal with the same level. CONSTITUTION: A signal selector(303) outputs a first input signal and a second input signal in response to a phase signal. An output level controller(301) controls the level of the output signal of a signal selector using the first and second input signals and reduces the swing width of the output signal if the levels of the first and second input signals are the same.
申请公布号 KR20090115009(A) 申请公布日期 2009.11.04
申请号 KR20080040933 申请日期 2008.04.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, CHANG KYU;KIM, KYUNG HOON
分类号 G11C7/10;G11C8/00 主分类号 G11C7/10
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